[pypy-dev] JIT improvements for RISC processors

[Fabrizio Milo aka misto]

Hi to everyone,

I am really interested in code machine generation for risc processors.
In order to have an idea of the work that can be done, and to create
a proposal I will ask some questions:

- What is already done? where is it? (paths, file names please)
- What ideas are already defined and need just to be implemented?
- Material that I have to / should read?

I have a rough background on RISC assembler,
the most comes from MIPS and IBM's PowerPC

some material I am aware of is http://tinyurl.com/9dw43


Don't let me escape for the second (last?) time!
:)

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* P~ython Addicted *
www.fabriziomilo.it